I'm trying to get a better understanding of how the NMOS works when a negative voltage is applied to the gate.
So I currently understand that the $P^-$ substrate is lightly doped with such a material from the group III elements. This allows for an excess of holes in the material.
What I don't understand is why these holes get attracted to the SiO2 insulator, creating a $P^+$ Accumulated channel under the material, when a negative voltage is applied.
Why is that negative voltage pulling the holes towards the SiO2 insulator? I would like to be able to visualize what exactly is happening.
Answer
The NMOS is a metal-oxide-semiconductor structure with a p-type semiconductor substrate. The oxide (SiO2) is an insulator. It is mainly used for n-MOSFETs which have an electron (n) inversion layer at the surface formed upon application of a positive voltage to the metal gate with respect to the substrate. The modulation of this electron inversion channel with applied gate voltage is the working principle of the metal-oxide-semiconductor field effect transistor. If a negative gate voltage is applied to the n-MOS structure, the positively charged holes in the p-type substrate are attracted to the SiO2/semiconductor interface by the applied negative electric field and produce an accumulation layer there. NMOS devices are, however, mostly used with positive applied gate voltages.
No comments:
Post a Comment